Instruction set architecture Questions

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1.

The number of memory-operands that are being supported by the typical ALU-instruction may be  varing from one to

A

Two

B

Three

C

Four

D

Five

Correct Answer: B

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2.

Modern Compiler Technology with its ability to effectively using larger numbers of

A

Memory

B

Registers

C

Stack

D

Queue

Correct Answer: B

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3.

If we have single memory address then the numbers of oprands allowed minimum, would be

A

1

B

2

C

3

D

4

Correct Answer: A

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4.

A GPR Computer having memory to memory operations can easily be ignored by the compiler and is used as

A

Load Architecture

B

Store Architecture

C

load-store computer

D

None of the above

Correct Answer: C

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5.

The operands working in the stack-architecture are implicitly

A

On bottom of the stack

B

On middle of the stack

C

On top of the stack

D

On top of queue

Correct Answer: C

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6.

In which of these modes, the immediate operand is included in the instruction itself?

A

register operand mode

B

immediate operand mode

C

register and immediate operand mode

D

none of the mentioned

Correct Answer: B

In immediate operand mode, the immediate operand is included in the instruction itself.

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7.

In register address mode, the operand is stored in

A

8-bit general purpose register

B

16-bit general purpose register

C

si or di

D

all of the mentioned

Correct Answer: D

In register address mode, the operand is stored either in one of the 8-bit or 16-bit general purpose registers or in SI, DI, BX or BP.

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8.

In which of the following addressing mode, the offset is obtained by adding displacement and contents of one of the base registers?

A

direct mode

B

register mode

C

based mode

D

indexed mode

Correct Answer: C

In a based mode, the offset is obtained by adding displacement and contents of one of the base registers, either BX or BP.

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9.

In which of the following addressing mode, the offset is obtained by adding displacement, with the contents of SI ?

A

direct mode

B

register mode

C

based mode

D

indexed mode

Correct Answer: D

In an indexed mode, the offset is obtained by adding displacement, with contents of an index register, either SI or DI.

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10.

The address of a location of the operand is calculated by adding the contents of any of the base registers, with the contents of any of index registers in

A

based indexed mode with displacement

B

based indexed mode

C

based mode

D

indexed mode

Correct Answer: B

In a based indexed mode, the operand is stored at a location, whose address is calculated by adding the contents of any of the base registers, with the contents of any of the index registers.

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