ALU data path and Control Unit Questions

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11.

A processor performing fetch or decoding of different instruction during the execution of another instruction is called ______ .

A

Super-scaling

B

Pipe-lining

C

Parallel Computation

D

None of these

Correct Answer: B

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12.

For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution ?

A

ISA

B

ANSA

C

Super-scalar

D

All of the above

Correct Answer: C

Super-scalar

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13.

The clock rate of the processor can be improved by

A

Improving the IC technology of the logic circuits

B

Reducing the amount of processing done in one step

C

By using overclocking method

D

All of the above

Correct Answer: D

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14.

Set on less than has the ALU control lines

A

1100

B

1010

C

1101

D

111

Correct Answer: D

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15.

A simple ALU is designed to perform 4 distinct operations: Addition, Subtraction, Logical AND, and Logical OR. Assuming a standard encoding scheme for operation selection, how many control lines are minimally required to select one of these four operations for the ALU?

Correct Answer:

To select one out of 'N' distinct operations, a minimum of 'log₂N' control lines are required. In this case, N = 4 (Addition, Subtraction, Logical AND, Logical OR). Number of control lines = log₂(4) = 2. Therefore, 2 control lines are minimally required to select one of the four operations.

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