Menu

Question Discussion & Solution

MCQ

Q.

The mcs 51 architecture supports

A

serial transmission and reception

B

simultaneous transmission and reception

C

transmission and reception of data using serial communication interface

D

all of the mentioned

Community Discussion

No discussions yet. Be the first to start!

You must be logged in to participate in the discussion.

Login to Discuss

Similar Questions

MCQ

1.

The serial communication is

A

cheaper communication

B

requires less number of conductors

C

slow process of communication

D

all of the mentioned

Discussion

MCQ

2.

The mode that offers the most secured parity enabled data communication at lower baud rates is

A

mode 2

B

mode 1

C

mode 0

D

all of the mentioned

Discussion

MCQ

3.

The task of converting the byte into serial form and transmitting it bit by bit along with start, stop and parity bits is carried out by

A

reception unit

B

serial communication unit

C

transmission unit

D

all of the mentioned

Discussion

MCQ

4.

If the microcontroller is expected to communicate in a multiprocessor system, then the required condition is

A

SM0 is set

B

SM1 is set

C

SM2 is set

D

REN is set

Discussion

MCQ

5.

The transmission unit does not require assistance from processor if once a byte for transmission is written to

A

SCON register

B

SBUF register

C

SFR address

D

Any of the mentioned

Discussion

More Microprocessor Topics

Microprocessor Basics

84 MCQs

Classification

10 MCQs

Input Output interfacing

20 MCQs

Microcontroller

35 MCQs

8085 Architecture

22 MCQs

8086 Microprocessor

107 MCQs

Multiprocessor Configuration

10 MCQs

Peripheral Interface

10 MCQs

Register Set of 8051

28 MCQs

Serial Communication Unit

12 MCQs

Segmentation

21 MCQs

Paging

14 MCQs

Instruction Set of 8086 8088

40 MCQs

Interrupt and Stack of 8051

20 MCQs

8051 Instruction Set

23 MCQs