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Q.

The idle mode can be terminated by

A

PRESET

B

CLEAR

C

Interrupt

D

Interrupt or reset

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MCQ

1.

In idle mode, the device that is disabled is

A

serial port

B

timer block

C

clock to CPU

D

all of the mentioned

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2.

The register that is used for accessing external data memory is

A

DPH

B

DPL

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DPTR

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NONE

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3.

The on-chip oscillator is stopped in

A

power mode

B

power down mode

C

idle mode

D

ideal mode

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4.

In idle mode, the device that is disabled is

A

serial port

B

timer block

C

clock to CPU

D

all of the mentioned

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5.

The PCON register consists of

A

power mode bit

B

power idle bit

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power ideal bit

D

power down bit and idle bit

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